1. Field of the Invention
The present invention relates to semiconductor fabrication, and in particular relates to a method for fabricating a metal redistribution layer.
2. Description of the Related Art
Historically, integrated circuits have been formed on surfaces of silicon substrates with conductive pads formed at peripheries thereof. Generally, wire bonds are attached to the conductive pads which provide electrical connections from the conductive pads to pads on a package substrate.
Increasing complexity of electronic circuitry of integrated circuits has required an increase in the number of input and output connections to integrated circuits. The increase in the input and the output connections has required input and output conductive pads to be formed more closely together. That is, the pitch between the conductive pads which are used as input and the output connections to the integrated circuits has decreased with increased circuit complexity.
Therefore, locating the conductive pads at the interior of the silicon substrate surface rather than the periphery allows the conductive pads to be physically spaced further apart. However, many integrated circuit designs exist in which the conductive pads are located at the periphery of the silicon substrate. The expense to retool the design process of the integrated circuit so that the conductive pads are located at the interior of the silicon substrate surface can be very large. That is, redesigning the integrated circuit so that the conductive pads are located at the interior of the silicon substrate surface can be prohibitively expensive.
It is desirable to have a method for forming a metal redistribution layer over an integrated circuit for interconnecting conductive pads located at the interior thereof with conductive pads located at the periphery thereof.